A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems

Author:

Lee Jang-Woo,Na Daehoon,Kavala Anil,Cho Hwasuk,Lee Junha,Yang Manjae,Song Eunjin,Kim Tongsung,Lee Seon-Kyoo,Jang Dong-Su,Chun Byung-Kwan,Jo Youngmin,Jung Sunwon,Jung Doo-Il,Kim Chanho,Kang Daewoon,Lee Tae-Sung,Jeong Byunghoon,Yoon Chiweon,Kang Dongku,Lee Seungjae,Ihm Jungdon,Byeon Dae Seok,Lee Jin-Yup,Hwang Sangjoon,Song Jai Hyuk

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. New distributed controlling architecture for high performances NAND generation;2022 IEEE 19th Annual Workshop on Microelectronics and Electron Devices (WMED);2022-04

2. A Theorem on Even Pancyclic Bipartite Digraphs;Mathematical Problems of Computer Science;2021-12-16

3. Design and Implementation of 64-bit SRAM and CAM on Cadence and Open-source environment;International Journal of Circuits, Systems and Signal Processing;2021-07-14

4. BIST Architecture for Magnetic Memories;Mathematical Problems of Computer Science;2020-12-25

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