SEU Mitigation on SRAM-based FPGAs through Domains-based Isolation Design Flow
Author:
Affiliation:
1. Politecnico di Torino,Turin,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9954459/9954461/09954492.pdf?arnumber=9954492
Reference12 articles.
1. An error-detection and self-repairing method for dynamically and partially reconfigurable systems
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3. PyXEL: An Integrated Environment for the Analysis of Fault Effects in SRAM-Based FPGA Routing;de sio;IEEE International Symposium on Rapid System Prototyping (RSP),2018
4. Module relocation in Heterogeneous Reconfigurable Systems-on-Chip using the Xilinx Isolation Design Flow
5. Soft Error Mitigation Controller v4.1 Product Guide;Xilinx Product Specification,2018
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