Data retention of silicon nanocrystal storage nodes programmed with short voltage pulses
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx5/16/33831/01610909.pdf?arnumber=1610909
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. In Situ Kinetic Observations on Crystal Nucleation and Growth;Chemical Reviews;2022-11-08
2. Analysis of Cycling Induced Interface Degradation in Si Nanocrystal Memory Devices;ECS Transactions;2012-04-27
3. Robust Data Retention and Superior Endurance of Silicon–Oxide–Nitride–Oxide–Silicon-Type Nonvolatile Memory with NH$_{3}$-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer;Japanese Journal of Applied Physics;2012-04-20
4. High-Reliability Trigate Poly-Si Channel Flash Memory Cell With Si-Nanocrystal Embedded Charge-Trapping Layer;IEEE Electron Device Letters;2012-04
5. Robust Data Retention and Superior Endurance of Silicon–Oxide–Nitride–Oxide–Silicon-Type Nonvolatile Memory with NH3-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer;Japanese Journal of Applied Physics;2012-04-01
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