Architectural study of reconfigurable photonic Networks-on-Chip for multi-core processors-Reference-Cited by-同舟云学术

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Architectural study of reconfigurable photonic Networks-on-Chip for multi-core processors

Published:2009-10 Issue: Volume: Page:
ISSN:
Container-title:2009 IEEE LEOS Annual Meeting Conference Proceedings
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Author:

Debaes C.,Artundo I.,Heirman W.,Loperena M.,Van Campenhout J.,Thienpont H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5339380/5343054/05343267.pdf?arnumber=5343267

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Dual-mode routing approach for photonic network on chip platforms;The Journal of Supercomputing;2016-01-19

2. Application-based dynamic reconfiguration in optical network-on-chip;Computers & Electrical Engineering;2015-07

3. The High Level Architecture (HLA) on Photonic Torus: Hardware and Software Co-design;2013 8th EUROSIM Congress on Modelling and Simulation;2013-09

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