Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

Author:

Sun Bainan,Zhang Zhe,Andersen Michael A.E.

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Influence of Parasitic Power Loop Inductance on Switch Performance in GaN HEMT;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05

2. PCB Layout Evaluation of GaN HEMT Power Loop;2023 IEEE 2nd International Power Electronics and Application Symposium (PEAS);2023-11-10

3. Origin of Common Source Inductance in Power Device Packages with Kelvin Source Terminal;2023 IEEE Energy Conversion Congress and Exposition (ECCE);2023-10-29

4. PCB Design Impact on GaN-Based Converter Operation;2023 IEEE Applied Power Electronics Conference and Exposition (APEC);2023-03-19

5. A Framework for Practical Design of Switching Nodes with Parallel-Connected MOSFETs;2022 IEEE Transportation Electrification Conference & Expo (ITEC);2022-06-15

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