Xilinx FPGA-based Ring Oscillator PUFs: Design Challenges and Solutions-Reference-Cited by-同舟云学术

Xilinx FPGA-based Ring Oscillator PUFs: Design Challenges and Solutions

Published:2022-06-07 Issue: Volume: Page:
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Container-title:2022 11th Mediterranean Conference on Embedded Computing (MECO)
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Author:

Kareem Husam¹,Dunaev Dmitriy¹

Affiliation:

1. Budapest University of Technology and Economics,Faculty of Electrical Engineering and Informatics,Department of Automation and Applied Informatics,Budapest,Hungary,H-1111

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9797068/9797069/09797077.pdf?arnumber=9797077

Reference13 articles.

1. Vivado Design Suite User Guide: Synthesis UG901 (v2017. 1);Xilinx,2017

2. Vivado Design Suite User Guide: Using Constraints UG903 (v2018. 3);Xilinx,2018

3. FPGA Bitstream Security: A Day in the Life

4. Towards Ideal Arbiter PUF Design on Xilinx FPGA: A Practitioner's Perspective

5. physical unclonable functions for device authentication and secret key generation;suh;2007 44th ACM/IEEE Design Automation Conference DAC,2007

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