Postsilicon validation methodology for microprocessors

Author:

Rotithor H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software,Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Proposition to Effective Execution of Power-On Test Case Script over SoC under Post-Silicon-Validation;2022 IEEE 6th Conference on Information and Communication Technology (CICT);2022-11-18

2. Hardware is the new Software;Proceedings of the 16th Workshop on Hot Topics in Operating Systems;2017-05-07

3. An Agile Post-Silicon Validation Methodology for the Address Translation Mechanisms of Modern Microprocessors;IEEE Transactions on Device and Materials Reliability;2017-03

4. Virtual CPU validation;Proceedings of the 25th Symposium on Operating Systems Principles;2015-10-04

5. Post-silicon platform for the functional diagnosis and debug of networks-on-chip;ACM Transactions on Embedded Computing Systems;2014-03

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