A Fast Hardware Architecture for Integer to \tauNAF Conversion for Koblitz Curves-Reference-Cited by-同舟云学术

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A Fast Hardware Architecture for Integer to \tauNAF Conversion for Koblitz Curves

Published:2012-05 Issue:5 Volume:61 Page:732-737
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Adikari Jithra,Dimitrov Vassil S.,Jarvinen Kimmo U.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx5/12/6173013/05753886.pdf?arnumber=5753886

Cited by 17 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Minimalistic Perspective on Koblitz Curve Scalar Multiplication for FPGA Platforms;2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC);2020-10-05

2. Coprocessor for Koblitz Curves;Lattice-Based Public-Key Cryptography in Hardware;2019-11-13

3. Multimedia Encryption on Bitplanes of Image Using ECC on Koblitz Curves with Lopez–Dahab Projective Coordinates;Lecture Notes in Electrical Engineering;2019

4. Flexible elliptic curve cryptography coprocessor using scalable finite field arithmetic blocks on FPGAs;Microprocessors and Microsystems;2018-11

5. w-Bit Shifting Non-Adjacent Form Conversion;KSII Transactions on Internet and Information Systems;2018-07-31

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