Huicore: A Generalized Hardware Accelerator for Complicated Functions
Author:
Affiliation:
1. School of Electronic Science and Engineering, Nanjing University, Nanjing, China
2. Department of Electrical Engineering, School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology, Kista, Sweden
Funder
Joint Funds of the National Natural Science Foundation of China
National Natural Science Foundation of China
Natural Science Foundation of Jiangsu Province for Youth
National Key Research and Development Program of China
National Science and Technology Major Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/9782465/09724639.pdf?arnumber=9724639
Reference21 articles.
1. Low Complexity Generic VLSI Architecture Design Methodology for $N^{th}$ Root and $N^{th}$ Power Computations
2. A Memory-Efficient Tables-and-Additions Method for Accurate Computation of Elementary Functions
3. Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding
4. A high-level synthesis and verification tool for application specific kth Root Processing Engine
5. A General Methodology and Architecture for Arbitrary Complex Number Nth Root Computation
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