Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior

Author:

Giustolisi Gianluca1ORCID,Palumbo Gaetano1ORCID

Affiliation:

1. Dipartimento di Ingegneria Elettrica Elettronica e Informatica, Università degli Studi di Catania, Catania, Italy

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 55-nm Three-Stage Operational Transconductance Amplifier With Single Cascode Miller Compensation for Large Capacitive Loads;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

2. Novel JFET Complementary Sziklai pair based Small Signal Amplifiers for Wireless Communication Receivers;2023 IEEE 9th International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA);2023-10-17

3. Implementation of OTA in 90nm Technology with Bandgap Reference Application;September 2023;2023-09

4. Study of Novel Small-Signal JFET Amplifiers in Sziklai pair Topology;2023 10th International Conference on Signal Processing and Integrated Networks (SPIN);2023-03-23

5. A 0.3 V Three-Stage Body-Driven OTA;Proceedings of SIE 2022;2023

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