High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion-Reference-Cited by-同舟云学术

High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion

Published:2022-12 Issue:12 Volume:69 Page:4944-4957
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Zhai Danfeng¹,Jiang Wenning²^ORCID,Jia Xinru¹,Lan Jingchao¹^ORCID,Guo Mingqiang³^ORCID,Sin Sai-Weng³^ORCID,Ye Fan¹^ORCID,Liu Qi⁴^ORCID,Ren Junyan¹^ORCID,Chen Chixiao⁴^ORCID

Affiliation:

1. State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China

2. Frontier Institute of Chips and Systems, Fudan University, Shanghai, China

3. State-Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, and the Faculty of Science and Technology—ECE, University of Macau, Macao, China

4. State Key Laboratory of ASIC and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China

Funder

National Natural Science Foundation of China

Science and Technology Innovation 2030—Major Project

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/8919/9985434/09870655.pdf?arnumber=9870655

Reference39 articles.

1. A Dual-Supply Two-Stage CMOS Op-amp for High-Speed Pipeline ADCs Application

2. A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers

3. Convergence Properties of the Nelder--Mead Simplex Method in Low Dimensions

4. A Four-Channel Time-Interleaved ADC With Digital Calibration of Interchannel Timing and Memory Errors

5. A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration

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