FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer-Reference-Cited by-同舟云学术

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FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer

Published:2024-09 Issue:9 Volume:71 Page:4156-4168
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Jiao Bo¹,Xu Lei¹,Yu Xinyu¹,Yang Haitao¹,Zhu Haozhe¹^ORCID,Wang Yu²,Zhu Jundong²,Wen Dexin²,Wang Lingli¹^ORCID,Tao Jun¹^ORCID,Chen Chixiao¹^ORCID,Han Yinhe³^ORCID,Liu Qi¹^ORCID,Sun Ninghui³^ORCID,Liu Ming¹

Affiliation:

1. State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University, Shanghai, China

2. Kiwimoore (Shanghai) Semiconductors Company Ltd., Shanghai, China

3. Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/8919/10654306/10586747.pdf?arnumber=10586747

Reference36 articles.

1. Hanguang 800 NPU – The Ultimate AI Inference Solution for Data Centers

2. Pioneering Chiplet Technology and Design for the AMD EPYC™ and Ryzen™ Processor Families : Industrial Product

3. Reliability Challenges in 2.5D and 3D IC Integration

4. Intel's Ponte Vecchio GPU : Architecture, Systems & Software

5. “Zen 4”: The AMD 5nm 5.7GHz x86-64 Microprocessor Core

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