A Lightweight DRDPG-Based RL DVFS for Video Rendering on CPU-GPU Integrated SoC-Reference-Cited by-同舟云学术

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A Lightweight DRDPG-Based RL DVFS for Video Rendering on CPU-GPU Integrated SoC

Published:2024-05 Issue:5 Volume:71 Page:2119-2131
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Zhou Qinxin¹^ORCID,Zhang Yunfang¹^ORCID,Xu Xinzi¹^ORCID,Zhang Qichen²,Wu Huaying¹,Lian Yong³^ORCID,Zhao Yang¹^ORCID

Affiliation:

1. School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China

2. Hupan Lab and DAMO Academy, Alibaba Group, Hang Zhou, China

3. Department of Electrical Engineering and Computer Science, Lassonde School of Engineering, York University, Toronto, ON, Canada

Funder

Alibaba DAMO Academy through Damo Academy Innovative Research Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8919/10510354/10403858.pdf?arnumber=10403858

Reference37 articles.

1. System-Level Power Management Using Online Learning

2. Redefining QoS and customizing the power management policy to satisfy individual mobile users

3. Hybrid DVFS Scheduling for Real-Time Systems Based on Reinforcement Learning

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Guest Editorial: Special Issue on Learning, Optimization, and Implementation for Circuits and Systems Driven by Artificial Intelligence;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

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