Author:
Ahuja S.,Gurumani S.T.,Spackman C.,Shukla S.K.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software,Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
10 articles.
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1. Background;Domain Specific High-Level Synthesis for Cryptographic Workloads;2019
2. HLS-Based Performance and Resource Optimization of Cryptographic Modules;2018 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Ubiquitous Computing & Communications, Big Data & Cloud Computing, Social Computing & Networking, Sustainable Computing & Communications (ISPA/IUCC/BDCloud/SocialCom/SustainCom);2018-12
3. High Level Synthesis of Complex Applications;Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2016-02-21
4. RunFein: a rapid prototyping framework for Feistel and SPN-based block ciphers;Journal of Cryptographic Engineering;2016-02-20
5. An Implementation of the AES Cipher Using HLS;2013 III Brazilian Symposium on Computing Systems Engineering;2013-11