Investigating the Highly Tolerant LDMOS Cell Array Design against the Negative Carrier Injection and the ESD Events-Reference-Cited by-同舟云学术

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Investigating the Highly Tolerant LDMOS Cell Array Design against the Negative Carrier Injection and the ESD Events

Published:2020-09 Issue: Volume: Page:
ISSN:
Container-title:2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
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Author:

Komatsu Kanako,Shinohara Daisuke,Shimizu Mariko,Ishii Yoshiaki,Sakamoto Toshihiro,Yonemura Koji,Matsuoka Fumitomo

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9163811/9170028/09170188.pdf?arnumber=9170188

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. ESD-ability Enhancement of High Voltage pLDMOSs with the Discrete Source Side;2022 IET International Conference on Engineering Technologies and Applications (IET-ICETA);2022-10-14

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