Improved Design for Hardware Implementation of Graph-Based Large Margin Classifiers for Embedded Edge Computing-Reference-Cited by-同舟云学术

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Improved Design for Hardware Implementation of Graph-Based Large Margin Classifiers for Embedded Edge Computing

Published:2022 Issue: Volume: Page:1-0
ISSN:2162-237X
Container-title:IEEE Transactions on Neural Networks and Learning Systems
language:
Short-container-title:IEEE Trans. Neural Netw. Learning Syst.

Author:

Arias-Garcia Janier¹^ORCID,de Souza Alan Candido²^ORCID,Gade Liliane²^ORCID,Yudi Jones³^ORCID,Coelho Frederico¹^ORCID,Castro Cristiano L.⁴^ORCID,Torres Luiz C. B.⁵^ORCID,Braga Antonio P.¹^ORCID

Affiliation:

1. Graduate Program in Electrical Engineering and the Department of Electronic Engineering, Universidade Federal de Minas Gerais (UFMG), Belo Horizonte, Brazil

2. Department of Electronic Engineering, Universidade Federal de Minas Gerais (UFMG), Belo Horizonte, Brazil

3. Department of Mechanical Engineering, Universidade de Brasília (UnB), Brasília, Brazil

4. Graduate Program in Electrical Engineering and the Department of Electrical Engineering, Universidade Federal de Minas Gerais (UFMG), Belo Horizonte, Brazil

5. Department of Computing and Systems, Universidade Federal de Ouro Preto (UFOP), João Monlevade, Minas Gerais, Brazil

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Artificial Intelligence,Computer Networks and Communications,Computer Science Applications,Software

Link

http://xplorestaging.ieee.org/ielx7/5962385/6104215/09805692.pdf?arnumber=9805692

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