A DC-50 GHz, low insertion loss and high P1dB SPDT switch IC in 40-nm SOI CMOS-Reference-Cited by-同舟云学术

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A DC-50 GHz, low insertion loss and high P1dB SPDT switch IC in 40-nm SOI CMOS

Published:2017-11 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE Asia Pacific Microwave Conference (APMC)
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Author:

Chen Cuilin,Xu Xiao,Yoshimasu Toshihiko

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8239375/8251355/08251363.pdf?arnumber=8251363

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Circuits for 5G applications implemented in FD-SOI and RF/PD-SOI technologies;New Materials and Devices Enabling 5G Applications and Beyond;2024

2. A 38GHz SPDT Traveling Wave Switch with 5A CDM ESD Protection in 45nm PDSOI for 5G System;2023 IEEE Radio and Wireless Symposium (RWS);2023-01-22

3. 2D‐Layered Manganese Perovskite with High Mobility;Advanced Functional Materials;2022-11-22

4. Pyrolysis of furfural residue in a bubbling fluidized bed reactor: Biochar characterization and analysis;Energy;2020-11

5. A High-Power 24–40-GHz Transmit–Receive Front End for Phased Arrays in 45-nm CMOS SOI;IEEE Transactions on Microwave Theory and Techniques;2020-11

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