Design and Implementation of High-Speed Serial Transmission for ADC Based on JESD204B
Author:
Affiliation:
1. Normal University,School of Physics and Electronics Hunan,Changsha,China
2. Science and Technology on Electro-Optical Information Security Control Laboratory,Tianjing,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10356861/10356862/10356884.pdf?arnumber=10356884
Reference22 articles.
1. A JESD204B-Compliant Architecture for Remote and Deterministic-Latency Operation
2. A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors
3. High-Level Synthesis Design of Scalable Ultrafast Ultrasound Beamformer With Single FPGA
4. Using FPGA-Based AMC Carrier Boards for FMC to Implement Intelligent Data Acquisition Applications in MTCA Systems Using OpenCL
5. A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller
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