Author:
Andonov R.,Balev S.,Rajopadhye S.,Yanev N.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
17 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Stencil Computation with Vector Outer Product;Proceedings of the 38th ACM International Conference on Supercomputing;2024-05-30
2. WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on ACAP;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25
3. Thoroughly Exploring GPU Buffering Options for Stencil Code by Using an Efficiency Measure and a Performance Model;IEEE Transactions on Multi-Scale Computing Systems;2018-07-01
4. Tessellating stencils;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2017-11-12
5. Tiling arbitrarily nested loops by means of the transitive;International Journal of Applied Mathematics and Computer Science;2016-12-01