An Ultra Low-Power Hardware Accelerator for Acoustic Scoring in Speech Recognition-Reference-Cited by-同舟云学术

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An Ultra Low-Power Hardware Accelerator for Acoustic Scoring in Speech Recognition

Published:2017-09 Issue: Volume: Page:
ISSN:
Container-title:2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)
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Author:

Tabani Hamid,Arnau Jose-Maria,Tubella Jordi,Gonzalez Antonio

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8090482/8091202/08091218.pdf?arnumber=8091218

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Exploiting beam search confidence for energy-efficient speech recognition;The Journal of Supercomputing;2024-07-15

2. Optimization strategies for GPUs: an overview of architectural approaches;International Journal of Parallel, Emergent and Distributed Systems;2023-02-05

3. SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks;ACM Transactions on Embedded Computing Systems;2023-01-24

4. At-scale assessment of weight clustering for energy-efficient object detection accelerators;Proceedings of the 37th ACM/SIGAPP Symposium on Applied Computing;2022-04-25

5. Asrpu: A Programmable Accelerator for Low-Power Automatic Speech Recognition;SSRN Electronic Journal;2022

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