Parasitic Interactions with Intermediate Substrates and Methods to Mitigate their Impact: A Case Study in Voltage Protection ICs
Author:
Affiliation:
1. Power Solutions Group onsemi,Bangalore,India
2. fomerly of Power Solutions Group onsemi,Santa Clara,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9885796/9885734/09885972.pdf?arnumber=9885972
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3. Fifty Nifty Variations of Two-Transistor Circuits: A tribute to the versatility of MOSFETs
4. The Floating NBL Architecture: Enabler of a Quasi-SOI process
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