Multi-Channel Architecture-Based FTL for Reliable and High-Performance SSD

Author:

Hsieh Jen-Wei,Lin Han-Yi,Yang Dong-Lin

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Self-Adapting Channel Allocation for Multiple Tenants Sharing SSD Devices;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-02

2. Delay-based I/O request scheduling in SSDs;Journal of Systems Architecture;2019-09

3. A Novel NAND Flash Memory Architecture for Maximally Exploiting Plane-Level Parallelism;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-08

4. Revive Bad Flash-Memory Pages by HLC Scheme;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2019-05

5. Exploiting Internal Parallelism for Address Translation in Solid-State Drives;ACM Transactions on Storage;2018-11-30

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