High Speed Column Level ADC Design with TDC Technology for CMOS Image Sensor
Author:
Affiliation:
1. Xi’an University of Technology,Department of Electronic Engineering,Xi’an,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10210847/10211258/10212063.pdf?arnumber=10212063
Reference13 articles.
1. A 1- $\mu$ s Ramp Time 12-bit Column-Parallel Flash TDC-Interpolated Single-Slope ADC With Digital Delay-Element Calibration
2. A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors
3. Low Power CMOS Image Sensors Using Two Step Single Slope ADC With Bandwidth-Limited Comparators & Voltage Range Extended Ramp Generator for Battery-Limited Application
4. A Calibration Technique for Two-Step Single-Slope Analog-to-Digital Converter
5. A Low-Power 12-Bit Extended Counting ADC Without Calibration for CMOS Image Sensors
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1. A Time-to-Digital Converter for Low-Power Consumption Single Slope Analog-to-Digital Converters in a High-Speed CMOS Image Sensor;Micromachines;2024-04-27
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