A Mixed Method to Mitigate the TID Effects on 28nm FDSOI Transistors
Author:
Affiliation:
1. Institut LIST, CEA, Université Paris-Saclay,Palaiseau,France
2. CEA-LETI, University Grenoble Alpes,Grenoble Cedex,France,38054
3. Centre for Nanoscience and Nanotechnology (C2N), CNRS, Université Paris-Saclay,Palaiseau,France
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9857595/9857677/09857702.pdf?arnumber=9857702
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