FPGA Based Hardware Accelerator for Sorting Data
Author:
Affiliation:
1. Shoubra Benha University,Faculty of Engineering,Dept. of Electrical Engineering,Cairo,Egypt
2. Institute of Aviation Engineering and Technology,Dept. of Electronics and Communications,Giza,Egypt
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9691394/9691306/09691432.pdf?arnumber=9691432
Reference17 articles.
1. IMPLEMENTATION OF SERIAL AND PARALLEL BUBBLE SORT ON FPGA
2. Exploiting parallelism for faster implementation of Bubble sort algorithm using FPGA
3. Design and implementation of sorting algorithms based on FPGA
4. Sorting networks and their applications
5. Hardware implementation of sorting algorithm using FPGA;gayathri,2018
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