Impact of technology scaling on substrate noise generation mechanisms [mixed signal ICs]-Reference-Cited by-同舟云学术

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Impact of technology scaling on substrate noise generation mechanisms [mixed signal ICs]

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Container-title:Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)
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Author:

Badaroglu M.,Wambacq P.,Van der Plas G.,Donnay S.,Gielen G.,De Man H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/9389/29800/01358867.pdf?arnumber=1358867

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise;Microelectronics Journal;2013-05

2. Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias;IEICE Transactions on Electronics;2007-04-01

3. An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity;IEICE Transactions on Electronics;2006-06-01

4. Evolution of substrate noise generation mechanisms with CMOS technology scaling;IEEE Transactions on Circuits and Systems I: Regular Papers;2006-02

5. Substrate noise coupling: a pain for mixed-signal systems (Keynote Address);SPIE Proceedings;2005-06-30

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