500 nm-sized Ni-TSVwith Aspect Ratio 20 for Future 3D-LSIs_A Low-Cost Electroless-Ni Plating Approach-Reference-Cited by-同舟云学术

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500 nm-sized Ni-TSVwith Aspect Ratio 20 for Future 3D-LSIs_A Low-Cost Electroless-Ni Plating Approach

Published:2019-05 Issue: Volume: Page:
ISSN:
Container-title:2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)
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Author:

Murugesan M.,Fukushima T.,Koyanagi M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8781947/8791743/08791781.pdf?arnumber=8791781

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Thermo-Mechanical Reliability Analysis and Raman Spectroscopy Characterization of Sub-micron Through Silicon Vias (TSVs) for Backside Power Delivery in 3D Interconnects;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. Advanced 3D Through-Si-Via and Solder Bumping Technology: A Review;Materials;2023-12-14

3. Fabrication and Characterization of Thin Metal Films Deposited by Electroless Plating with Organic Additives for Electrical Circuits Applications;Micromachines;2023-05-29

4. Chip-to-Chip Hybrid Bonding with Larger-Oriented Cu Grains for µ-joints Beyond 100 K;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

5. A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process;Metals;2021-10-19

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