Hardware Efficient Radix-3/4/11 based FFT Processor for 5G NR Application
Author:
Affiliation:
1. University of Electronic Science and Technology of China,National Key Laboratory of Science and Technology on Communications,Chengdu,Sichuan,China,611731
2. School of Information Science and Engineering at the Southeast University
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10051833/10051818/10052092.pdf?arnumber=10052092
Reference20 articles.
1. An introduction to programming the Winograd Fourier transform algorithm (WFTA)
2. An Area- and Energy-Efficient Multimode FFT Processor for WPAN/WLAN/WMAN Systems
3. A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands
4. VLSI Design and Implementation of Reconfigurable 46-Mode Combined-Radix-Based FFT Hardware Architecture for 3GPP-LTE Applications
5. 48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-32 and Radix-23 Design Approaches
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