Escape Routing for Staggered-Pin-Array PCBs-Reference-Cited by-同舟云学术

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Escape Routing for Staggered-Pin-Array PCBs

Published:2013-09 Issue:9 Volume:32 Page:1347-1356
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Yuan-Kai Ho ,Hsu-Chieh Lee ,Yao-Wen Chang

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/6582559/06582597.pdf?arnumber=6582597

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. MCMCF-Router: Multi-capacity Ordered Escape Routing Algorithms for Grid/Staggered Pin Array;ACM Transactions on Design Automation of Electronic Systems;2024-09-14

2. MORE-Router+: Multilayer Multi-capacity ORdered Escape Routing via Bus-oriented Layer Assignment;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03

3. Legalized Routing Algorithm Based on Linear Programming;Electronics;2023-10-19

4. A Fast Escape Router for Large-Scale Staggered-Pin-Array PCBs;2023 International Symposium of Electronics Design Automation (ISEDA);2023-05-08

5. MC-MCF: A Multi-Capacity Model for Ordered Escape Routing;2023 24th International Symposium on Quality Electronic Design (ISQED);2023-04-05

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