DyPhase: A Dynamic Phase Change Memory Architecture With Symmetric Write Latency and Restorable Endurance
Author:
Funder
SRC and NSF
AFOSR
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Link
https://ieeexplore.ieee.org/ielaam/43/8440579/8067442-aam.pdf
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