Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings-Reference-Cited by-同舟云学术

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Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings

Published:2010-04 Issue:4 Volume:29 Page:509-527
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Jhaveri Tejas,Rovner Vyacheslav,Liebmann Lars,Pileggi Larry,Strojwas Andrzej J.,Hibbeler Jason D.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/5433734/05433742.pdf?arnumber=5433742

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