Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators-Reference-Cited by-同舟云学术

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Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators

Published:2020-02 Issue:2 Volume:39 Page:424-437
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Ma Yufei^ORCID,Cao Yu,Vrudhula Sarma^ORCID,Seo Jae-Sun^ORCID

Funder

National Science Foundation

Intel Labs

C-BRIC, one of six centers in JUMP, an SRC program sponsored by DARPA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

https://ieeexplore.ieee.org/ielam/43/8964044/8558097-aam.pdf

Cited by 47 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Design Framework for Generating Energy-Efficient Accelerator on FPGA Toward Low-Level Vision;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-08

2. An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07

3. Pflow: An end-to-end heterogeneous acceleration framework for CNN inference on FPGAs;Journal of Systems Architecture;2024-05

4. Edge-Side Fine-Grained Sparse CNN Accelerator With Efficient Dynamic Pruning Scheme;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-03

5. Developing a Portable Fluorescence Imaging Device for Fish Freshness Detection;Sensors;2024-02-22

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