Power-safe test application using an effective gating approach considering current limits
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5772241/5783722/05783777.pdf?arnumber=5783777
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Statistic-Based Scan Chain Reordering for Energy-Quality Scalable Scan Test;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2018-09
2. Functional-power-aware Partial Gating Method for Low Power Scan-shift;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2018-02-28
3. An integrated DFT solution for power reduction in scan test applications by low power gating scan cell;Integration;2017-03
4. Physical-aware gating element insertion for thermal-safe scan shift operation;IEICE Electronics Express;2017
5. Comprehensive optimization of scan chain timing during late-stage IC implementation;Proceedings of the 53rd Annual Design Automation Conference;2016-06-05
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