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CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation

  • Published:2020-12 Issue:12 Volume:39 Page:4385-4398
  • ISSN:0278-0070
  • Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • language:
  • Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Hosseini Monazzah Amir MahdiORCID,Rahmani Amir M.,Miele AntonioORCID,Dutt Nikil

Funder

Marie Curie Actions of the European Union’s H2020 Programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems;ACM Transactions on Embedded Computing Systems;2024-04-25

2. CAWPR: Contention Aware Write Preemptive Management Policy for Hybrid Last Level Caches;2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2023-11-19

3. Poster Abstract: Energy vs. Quality of Approximate Non-volatile Writes in Intermittent Computing;Proceedings of the 21st ACM Conference on Embedded Networked Sensor Systems;2023-11-12

4. VVC decoder intra prediction using approximate storage: an error resilience evaluation;Analog Integrated Circuits and Signal Processing;2023-10-21

5. RISC-V-Based Evaluation and Strategy Exploration of MRAM Triple-Level Hybrid Cache Systems;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-07
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