Swallow: A Versatile Accelerator for Sparse Neural Networks

Author:

Liu BoshengORCID,Chen XiaomingORCID,Han YinheORCID,Xu Haobo

Funder

National Key Research and Development Program of China

Key Research Program of Frontier Sciences, CAS

National Natural Science Foundation of China

Youth Innovation Promotion Association CAS

Young Elite Scientists Sponsorship Program by CAST

Beijing Academy of Artificial Intelligence

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An Efficient Sparse-Aware Summation Optimization Strategy for DNN Accelerator;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. CUTE: A scalable CPU-centric and Ultra-utilized Tensor Engine for convolutions;Journal of Systems Architecture;2024-04

3. Sense: Model-Hardware Codesign for Accelerating Sparse CNNs on Systolic Arrays;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-04

4. From CNN to DNN Hardware Accelerators: A Survey on Design, Exploration, Simulation, and Frameworks;Foundations and Trends® in Electronic Design Automation;2023

5. Work-in-Progress: Toward Energy-efficient Near STT-MRAM Processing Architecture for Neural Networks;2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS);2022-10

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