CMOS Charge Pump with Ultra-Low Current Mismatch
Author:
Affiliation:
1. Chung-Yuan Christian University,Department of Electronic Engineering,Taoyuan City,Taiwan
2. MOXA Inc,Signal Integrity Section,New Taipei City,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9983535/9983517/09983569.pdf?arnumber=9983569
Reference6 articles.
1. A 0.025% DC Current Mismatch Charge Pump for PLL Applications
2. Charge pump with perfect current matching characteristics in phase-locked loops
3. Gain-Boosting Charge Pump for Current Matching in Phase-Locked Loop
4. A Novel Charge Pump with Ultra-Low Current Mismatch and Variation for PLL
5. A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order /spl Delta//spl Sigma/ modulator
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1. A Low Current Mismatch Charge Pump for Phase-Locked Loop;2024 IEEE 6th Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC);2024-05-24
2. A Low Power High Swing Charge Pump for Phase Locked Loops;2023 5th International Conference on Circuits and Systems (ICCS);2023-10-27
3. Design of programmable charge pump based on 65nm CMOS process;2023 International Conference on Microwave and Millimeter Wave Technology (ICMMT);2023-05-14
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