A High-Density and Low-Crosstalk Differential Pin Map for 112 Gb/s PAM4 Applications

Author:

Zhang Mu-Shui1ORCID

Affiliation:

1. Guangzhou Higher Education Mega Center, School of Electronics and Information Technology, Sun Yat-sen University, Panyu, Guangzhou, China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics

Reference16 articles.

1. A 224 Gb/s DAC-based PAM-4 transmitter with 8-tap FFE in 10 nm CMOS;kim;IEEE ISSCC Dig Tech Papers,2021

2. F5: 56 Gb/s to 112 Gb/s and beyond–design challenges and solutions in wireline communications;joy;IEEE ISSCC Dig Tech Papers,2019

3. 112 G PAM 4/56 G NRZ interconnect design for high channel count packages;liu;Proc IEEE 27th Conf Electr Perform Electron Packag Syst (EPEPS),2018

4. Crosstalk challenge and mitigation through strategic pin placement for 25 Gbps and beyond;dong;Proc IEEE 65th Electron Compon Technol Conf (ECTC),2015

5. Differential Crosstalk Mitigation in the Pin Field Area of SerDes Channel With Trace Routing Guidance

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3. Application of Signal Processing Techniques for Noise Reduction;Handbook of Vibroacoustics, Noise and Harshness;2024

4. Perturbed Pin Map Design for Low Differential Crosstalk in 112 Gb/s PAM4 Applications;IEEE Transactions on Signal and Power Integrity;2024

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