Back-Gate Lumped Resistance Effect on AC Characteristics of FD-SOI MOSFET

Author:

Vanbrabant Martin1ORCID,Nyssens Lucas1ORCID,Kilchytska Valeriya1ORCID,Raskin Jean-Pierre1ORCID

Affiliation:

1. Institute for Information and Communication Technologies, Electronics and Applied Mathematics (ICTEAM), Université Catholique de Louvain, Louvain-la-Neuve, Belgium

Funder

Fonds de la Recherche Scientifique (FNRS), Belgium, through the FNRS-PDR Project “Cross-Coupled Effects in Nanometer-Scale Transistors Toward Reliable Cryogenic CMOS-Based Circuits;”

EC and Innoviris (Belgium–Brussels Region) through the ECSEL JU “BEYOND 5” Project

FNRS as a Research Fellow

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics

Reference17 articles.

1. A new analytical scalable substrate network model for RF MOSFETs

2. An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs

3. 4-port isolated MOS modeling and extraction for mmW applications;dormieu;Proc ESSCIRC,2012

4. 4-port RF performance assessment and compact modeling of UTBB-FDSOI transistors

5. Impact of device shunt loss on mm-wave switch performance in 22 nm FD-SOI and DC-80 GHz SPDT;rack;Proc Euro Solid-State Device Res Conf (ESSDERC),2021

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