Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography
Author:
Affiliation:
1. Villanova University,Department of Electrical and Computer Engineering,PA,19087
Funder
NSF
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9839666/9839669/09839980.pdf?arnumber=9839980
Reference21 articles.
1. Post-Quantum Cryptoprocessors Optimized for Edge and Resource-Constrained Devices in IoT
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4. Implementing and benchmarking three lattice-based post-quantum cryptography algorithms using software/hardware code-sign;dang;FPT,2019
5. High-speed instruction-set coprocessor for lattice-based key encapsulation mechanism: Saber in hardware;roy;IACR TCHES,2020
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1. High-Performance Hardware Implementation of the Saber Key Encapsulation Protocol;Electronics;2024-02-06
2. LEAP: Lightweight and Efficient Accelerator for Sparse Polynomial Multiplication of HQC;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-06
3. Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05
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