A Compact Phase-Domain Delta–Sigma Time-to-Digital Converter With 8.5-ps Resolution for LiDAR Applications
Author:
Affiliation:
1. Department of Electrical and Electronics Engineering, Yonsei University, Seoul, South Korea
2. Post-Silicon Semiconductor Institute, Korea Institute of Science and Technology, Seoul, South Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/8011414/10359146/10480694.pdf?arnumber=10480694
Reference8 articles.
1. A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging
2. A 30-frames/s, $252\times144$ SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming
3. An 80×60 Flash LiDAR Sensor with In-Pixel Histogramming TDC Based on Quaternary Search and Time-Gated Δ-Intensity Phase Detection for 45m Detectable Range and Background Light Cancellation
4. A reconfigurable QVGA/Q3VGA direct time-of-flight 3D imaging system with on-chip depth-map computation in 45/40nm 3D-stacked BSI SPAD CMOS;Stoppa
5. A Simple Analytic Modeling Method for SPAD Timing Jitter Prediction
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