Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies-Reference-Cited by-同舟云学术

Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies

Published:2023-04-24 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE 41st VLSI Test Symposium (VTS)
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Author:

Pavanello Fabio¹,Vatajelu Elena Ioana²,Bosio Alberto¹,Van Vaerenbergh Thomas³,Bienstman Peter⁴,Charbonnier Benoit⁵,Carpegna Alessio⁶,Di Carlo Stefano⁶,Savino Alessandro⁶

Affiliation:

1. Univ. Lyon, Ecole Centrale de Lyon, INSA Lyon, Université Claude Bernard Lyon 1,CPE Lyon, CNRS, INL

2. Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,38000

3. Hewlett Packard Labs,HPE Belgium,Diegem,Belgium,B-1831

4. Ghent University - Imec,Gent,Belgium

5. Univ. Grenoble Alpes,CEA, LETI,Grenoble,France

6. Politecnico di Torino,Control and Computer Eng. Department,Torino,Italy

Funder

Horizon Europe

EMI

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10139918/10139926/10139932.pdf?arnumber=10139932

Reference81 articles.

1. A Survey on Deep Learning Resilience Assessment Methodologies

2. Parallel convolutional processing using an integrated photonic tensor core;feldmann;Nature,2021

3. SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems

4. Photonic Multiply-Accumulate Operations for Neural Networks

5. ImageNet classification with deep convolutional neural networks

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