A scalable algorithm for RTL insertion of gated clocks based on ODCs computation-Reference-Cited by-同舟云学术

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A scalable algorithm for RTL insertion of gated clocks based on ODCs computation

Published:2005-01 Issue:1 Volume:24 Page:29-42
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/30006/01372659.pdf?arnumber=1372659

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5. Exercising Symbolic Discrete Control for Designing Low-power Hardware Circuits: an Application to Clock-gating;IFAC-PapersOnLine;2018

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