On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Surface Methodology

Author:

Harish B. P.,Bhat Navakanta,Patil Mahesh B.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Statistical Analysis of an On-Chip Low Power Current Source Using Machine Learning;2023 8th International Conference on Computers and Devices for Communication (CODEC);2023-12-14

2. Domain-Constrained Metamodels for Expedited Robust Design of Compact Microwave Components;2021 IEEE MTT-S International Microwave Symposium (IMS);2021-06-07

3. Reliability Challenges in FinFETs;Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs;2021

4. Accurate Leakage/Delay Estimation for FinFET Standard Cells under PVT Variations using the Response Surface Methodology;ACM Journal on Emerging Technologies in Computing Systems;2014-11-18

5. Hierarchical statistical analysis of complex analog and mixed-signal systems;International Journal of Electronics;2014-02-24

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