Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels-Reference-Cited by-同舟云学术

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Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels

Published:2008-10 Issue:10 Volume:27 Page:1866-1879
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Chen-Ling Chou ,Ogras U.Y.,Marculescu R.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/4627531/04627545.pdf?arnumber=4627545

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