Author:
Chu C.-M.,Potkonjak M.,Thaler M.,Rabaey J.
Cited by
11 articles.
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1. TinyGarble: Highly Compressed and Scalable Sequential Garbled Circuits;2015 IEEE Symposium on Security and Privacy;2015-05
2. An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2008-04
3. On effective slack management in postscheduling phase;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2005-04
4. Performance-constrained hierarchical pipelining for behaviors, loops, and operations;ACM Transactions on Design Automation of Electronic Systems;2001-01
5. Multidimensional interleaving for synchronous circuit design optimization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;1997