Stress-strain analysis and optimization of TSV interconnect structure parameters under thermal cyclic load loading based on bp neural network-Reference-Cited by-同舟云学术

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Stress-strain analysis and optimization of TSV interconnect structure parameters under thermal cyclic load loading based on bp neural network

Published:2023-08-08 Issue: Volume:39 Page:1-6
ISSN:
Container-title:2023 24th International Conference on Electronic Packaging Technology (ICEPT)
language:
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Author:

Wang Lilin¹,Huang Chunyue¹,Wu Liye¹,Liu Xiaobin¹,Liu Xianjia¹,Zhang Huaiquan¹

Affiliation:

1. Guilin University of Electronic Technology,School of Electronic Mechanical Engineering,Guilin,China

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10491594/10491891/10492234.pdf?arnumber=10492234

Reference12 articles.

1. Packaging technology in the post-Moore era[J];Tong;Electronic industry special equipment,2010

2. Research progress of silicon through-hole three-dimensional packaging technology[J];Bangzhao;Journal of the Chinese Academy of Electronic Science,2014

3. Research progress of copper interconnect plating process for silicon through-hole in three-dimensional package[J];Miao;Electroplating and Finishing,2021

4. Development and challenges of silicon through-hole technology[J];Peisheng;Electronic Components and Materials,2012

5. Thermo-mechanical simulations for 4-layer stacked IC packages

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