A novel approach to 3D stacking of power chips with hot-via interconnections
Author:
Affiliation:
1. The 29th Research Institute of China Electronics Technology Group Corporation,Chengdu,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10491594/10491891/10491956.pdf?arnumber=10491956
Reference5 articles.
1. Soldered hot-via E-band and W-band power amplifier MMICs for millimeter-wave chip scale packaging
2. High productivity thermal compression bonding for 3D-IC
3. Optimization of Micro-interconnection Distribution of Gold Stud Bumps for Thermo-sonic Flip Chip Bonding
4. Hot-via interconnects: a step toward surface mount chip scale packaged MMICs up to 110 GHz
5. A Surface Mount 45 to 90 GHz Low Noise Amplifier Using Novel Hot-via Interconnection
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