Effects of dishing and annealing temperature on wafer to wafer hybrid bonding
Author:
Affiliation:
1. The Institute of Technological Sciences Wuhan University,Wuhan
2. School of Materials Science and Engineering Wuhan University of Technology,Wuhan
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10491594/10491891/10492187.pdf?arnumber=10492187
Reference16 articles.
1. A systematic literature review on hardware implementation of artificial intelligence algorithms
2. Reliable 300 mm Wafer Level Hybrid Bonding for 3D Stacked CMOS Image Sensors
3. Wafer-to-Wafer Hybrid Bonding Development by Advanced Finite Element Modeling for 3-D IC Packages
4. Improvement of via dishing and non-uniformity in TSV chemical mechanical planarization
5. 200 nm Wafer-to-wafer overlay accuracy in wafer level Cu/SiO2 hybrid bonding for BSI CIS
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