MLESD: Machine Learning Assisted Faster On-Chip ESD Convergence Strategy-Reference-Cited by-同舟云学术

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MLESD: Machine Learning Assisted Faster On-Chip ESD Convergence Strategy

Published:2024-01-06 Issue: Volume: Page:281-286
ISSN:
Container-title:2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)
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Author:

Nishad Sashank¹,Kundu Santanu¹,Richaud Nicolas²,Mallikarjun S¹,Prasad Manoranjan³,Renker Lennart⁴

Affiliation:

1. Intel Technology India Pvt. Ltd. SRR Campus,Network and Edge Group,Bengaluru,India

2. Intel Corporation,Product Enablement Solutions Group,Milano,Italy

3. Intel Technology India Pvt. Ltd. SRR Campus,Client Computing Group,Bengaluru,India

4. Intel Deutschland GmbH AMC Campus,Product Enablement Solutions Group,Munich,Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10483275/10483296/10483370.pdf?arnumber=10483370

Reference19 articles.

1. ESD Protection Device and Circuit Design for Advanced CMOS Technologies

2. Design and Rapid Assessment of Efficient On-Chip ESD Protection Strategy

3. Is ESD Protection Design Planning for Large SoC Verified During SoC Floorplan Design Stage?

4. Electromagnetic Compatibility (EMC) - Part 4-2: Testing and Measurement Techniques Electrostatic Discharge (ESD) Immunity Test;International StandardIEC 61000-4-2,2008

5. Compact Thermal Failure Model for Devices Subject to Electrostatic Discharge Stresses

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