Logic locking emulator on FPGA: A conceptual view-Reference-Cited by-同舟云学术

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Logic locking emulator on FPGA: A conceptual view

Published:2024-01-06 Issue: Volume: Page:553-559
ISSN:
Container-title:2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)
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Author:

Chellam Manjith Baby Sarojam¹,Natarajan Ramasubramanian²,Naganathan Nagi³

Affiliation:

1. Indian Institute of Information Technology Kottayam,Department of Computer Science and Engineering-Cybersecurity,Kottayam,India

2. National Institute of Technology Tiruchirappalli,Department of Computer Science and Engineering,Tiruchirappalli,India

3. Microsoft,Raleigh,NC,USA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10483275/10483296/10483519.pdf?arnumber=10483519

Reference18 articles.

1. India’s Electronics Industry: Potential for Domestic Manufacturing and Exports;Gupta,2021

2. A Survey on Hardware Vulnerability Analysis Using Machine Learning

3. An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools

4. Trace Logic Locking: Improving the Parametric Space of Logic Locking

5. SARLock: SAT attack resistant logic locking

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